Prior desynchronizer techniques and arrangements for converting synchronous digital transmission signals to asynchronous digital transmission signals are known. In recent digital transmission systems it has become important to smooth large gaps in a supplied data signal resulting from overhead bit and stuff bit removal. This is particularly important, for example, in converting a Synchronous Digital Hierarchy (SDH) STM-1 155.520 Mb/s synchronous digital signal to a CEPT-4 139.264 Mb/s asynchronous digital signal.
As is known, overhead bit removal from the SDH STM-1 signal results in relatively high jitter components. Additionally, it is also known that so-called pointer adjustments are used to reconcile phase and frequency differences between a clock signal derived from an incoming STM-1 signal and a local clock signal. These pointer adjustments are made on a byte-wise basis and can be either positive or negative. For example, for the CEPT-4 application, three bytes are used for the pointer adjustments, i.e., for stuffing, while for the DS3 application one byte is employed. During normal system operation, the pointer adjustments occur relatively infrequently. This causes a low frequency, relatively large peak-to-peak jitter component in the derived clock. When the system operation is degraded, pointer adjustments may occur more often. Thus, a wide range of pointer adjustment rates is possible.
A so-called bit leaking technique in conjunction with a phase locked loop and a desynchronizing elastic store has been proposed in an attempt at smoothing gaps in a derived clock caused by the pointer adjustments in a SDH signal format. A bit leak is defined as one (1) bit of phase error being supplied to a phase locked loop. One of these techniques employs a bit-by-bit leaking adjustment so that a phase locked loop having a "wider" bandwidth may be employed in the desynchronizer. This bit-by-bit technique, however, does not adequately compensate for the full range of pointer adjustment rates which may occur. Attempts at compensating for the pointer adjustments employing adaptive bit leaking arrangements have also been proposed. However, to the best of my knowledge the proposed adaptive bit leaking arrangements still cause excessive low frequency jitter to occur in the asynchronous digital signal, e.g., the CEPT-4 signal, or just simply do not operate satisfactorily.